Semiconductor memories are widely used in integrated circuits for electronic applications, including radios, televisions, cell phones, and personal computing devices, etc. One type of semiconductor memory device involves spin electronics, which combines semiconductor technology and magnetic materials and devices. The spins of electrons, through their magnetic moments, rather than the charge of the electrons, are used to indicate a bit. One such spin electronic device is a magnetoresistive random access memory (MRAM) array, which includes conductive lines (word lines and bit lines) positioned in different directions, e.g., perpendicular to each other in different metal layers. The conductive lines sandwich a magnetic tunnel junction (MTJ), which functions as a magnetic memory cell. Compared to current volatile memory, MRAM typically has similar performance and density, but lower power consumption.
As integrated circuits (IC) including such MRAM cells become more popular, it is desirable to maximize the number of MRAM cells within a given area of IC to maximize storage capacity. An existing MRAM device includes MRAM cells arranged in an array on a backend layer. Each individual MRAM cell in the existing MRAM device includes an MTJ arranged in parallel to the backend layer. Packing more and more MRAM cells in a given area may encounter a limit. For example, decreasing the size of the MRAM cells would allow for higher storage density, but at some critical size the magnetization of the magnetic memory cell starts flipping randomly its direction due to thermal activation which marks superparamagnetic state of the system, which sets a superparamagnetic limit on the current storage density and capacity. Thus, existing MRAM cells and devices and methods to make the same are not entirely satisfactory.